With Rojalin Mishra, Lead Verification Engineer (Riverlane)

This talk explores the engineering realities behind quantum computing, focusing on the role of hardware verification in building reliable quantum systems. Drawing on experience as a lead verification engineer working on FPGA-based quantum error correction systems, the speaker shares both personal career insights and the technical challenges involved in developing hardware at the frontier of emerging technology.

The session begins with a reflection on the speaker’s journey into hardware verification, highlighting the importance of persistence, analytical thinking, and systematic problem-solving in a highly specialised field. It also examines the challenge of communicating verification work to wider teams, and the need for collaboration across multiple engineering disciplines in quantum hardware development.

A central theme is the demystification of quantum error correction. Through practical analogies and examples, attendees will learn why qubits are fragile, how errors accumulate, and how engineers design and verify systems to maintain reliability. The talk demonstrates how abstract quantum physics becomes practical engineering through FPGA-based implementations, error-detection circuits, and rigorous testing methodologies.

Using real debugging stories from high-stakes projects, the presentation also shows how verification provides a broader framework for structured problem-solving across engineering domains. Attendees will gain practical insights into quantum hardware, verification engineering, and the mindset required to innovate effectively in advanced technology sectors.

Biography

I am an Electronics and Communications engineer with over a decade of experience in ASIC verification, specializing in complex digital systems and verification methodologies. I currently serve as a Lead Verification Engineer, driving FPGA-based verification for Quantum Error Correction within the rapidly evolving field of Quantum Computing.