FPGA Frontrunners @ Microchip
FPGA Frontrunners @ Microchip
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Field Programmable Gate Arrays (FPGAs) play a critical role in modern electronic systems, powering applications that range from everyday consumer products to mission-critical infrastructure. Their ability to be customized and reconfigured after deployment makes them uniquely valuable in fast-moving technology environments. At the same time, this adaptability introduces distinct security challenges that must be carefully addressed.
Because FPGAs can be reprogrammed in the field, they present a broader attack surface than fixed-function hardware. Threats targeting configuration data, intellectual property, firmware integrity, and runtime behavior can compromise not only the device itself, but also the larger systems that rely on it. As FPGAs are increasingly used to support advanced workloads—including data-intensive and intelligent processing—security risks continue to grow in both scope and impact.
Effective FPGA security extends beyond physical protection. It encompasses the full lifecycle and ecosystem surrounding the device, including design tools, bitstreams, firmware, software interfaces, and data flows. In systems that incorporate adaptive or AI-assisted functionality, ensuring trust, integrity, and resilience across this ecosystem is especially critical.
This event explores the evolving landscape of FPGA security, highlighting emerging threats, recent advances, and proven mitigation strategies. Through expert insights and real-world case studies, the program aims to equip engineers, researchers, and security professionals with practical guidance for securing FPGA-based systems today and in
knowledge, techniques, and assurance frameworks necessary to design systems that are not only resilient and secure—but demonstrably so.
Who Should Attend
- FPGA Designers and Engineers
- System Architects
- Safety and Security Specialists
- Supply Chain Professionals
- Industry Regulators and Standards Bodies
Why Attend?
- Gain insights from leading experts on the evolving risks and mitigation strategies
- Learn how to meet functional safety and security requirements across multiple industries
- Network with industry peers and potential collaborators
- Participate in discussions on best practices, regulatory trends, and real-world case studies
Agenda
| Time | Details |
|---|---|
| 10:00 | Registration |
| 10:30 | Microchip Secure FPGA’s Ian Pearson Pr. ESE, Microchip |
| 11:00 | A Visual Demonstration of True Random Numbers from a Quantum Computer Phill J Payne Principal Digital Design Engineer, Novomorphic |
| 11:30 | Are FPGAs unique for security? Martin Thompson Senior Technical Specialist, ZF Engineering Solutions |
| 12:00 | Beyond Bitstream Encryption: FPGA Security for High-Assurance Systems Daniel Tee Senior Firmware (FPGA) Engineer, Leonardo |
| 12:30 | Networking Lunch |
| 13:30 | Overview of prEN50767 : CRA Vertical Standard for FPGA/ASIC Peter Trott Staff FAE, Microchip |
| 14:00 | Hardware-Rooted Bitstream Security Mans Ahmadian Chief Innovation Officer, Sundance |
| 14:30 | Wrap Up |
| 14:45 | Close |
