As complexity accelerates, designers face growing challenges in architecture, design, system scaling and workflow.

Following our first event on Digital SoC Design in November, this hands-on event brings together Analogue and Mixed Signal chip architects and designers to explore real-world pain points and application trends, sharing lessons learned. During this event, we will explore the key challenges and opportunities facing industry and identify potential collaboration to support industry growth.

We will explore three contemporary themes during the event, with a plenary discussion following each one to discuss the topics raised and identify relevant actions going forward.

Running concurrently at the same venue, TechWorks and UKESF are hosting a Chip Design Early Careers event which will bring together industry and emerging talent. The UKESF Digital Design – Early Careers track, will give companies the opportunity to engage with up to 50 students and graduates: next-generation chip designers at the point where they are actively making career choices. Participants can speak directly to students and early-career engineers who want to learn more about chip design as a career, and which organisations they can join and grow with.

The future of AMS Design

How is AMS design evolving and where are we compared with pure-play digital CMOS
Potential themes:

• Design for performance, noise, and integrity across PVT
• Trade-offs across process nodes and analogue scaling limits vs digital scaling; voltage range, noise, performance, cost
• Design migration, IP integration and reuse
• Design flow and productivity: How can automation and AI help?
• Layout challenges, routing, optimization and physical verification
• Co-simulation, model abstraction and system-level verification

System architecture and Integration

Meeting system requirements while avoiding parasitics and interference is not just a circuit-level challenge. What are the current trends in system architecture and integration?

Potential themes:

• System partitioning, simulation and integration: Performance / Power / Area
• Digital-analogue interfacing and interconnect. Interference mitigation and isolation
• Multi-die integration: Yield reliability, Power delivery, Thermal management
• Signal integrity and noise coupling in advanced packaging, 2.5D and 3D
• Multi-die mixed signal chiplets and heterogeneous integration

Application drivers for AMS Design

Many emerging technologies are driving AMS innovation. What are the major application challenges pushing the frontier of analogue design today?

Potential themes:

Future compute (AI, Data centres, High-performance compute)

• • High-speed SerDes, Photonic interconnect and Clock and Data Recovery
  • Power delivery networks, voltage regulation, and monitoring
  • Analog and in-memory compute

IoT, connectivity, med-tech and wearables

• • Low-noise analogue sensor front ends
  • Edge AI / Neuromorphic compute
  • Sensor – Edge AI integration
  • Low power RF
  • Energy harvesting
  • Security