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DTSTART;VALUE=DATE:20261117
DTEND;VALUE=DATE:20261118
DTSTAMP:20261104T143540Z
CREATED:20261104T143540Z
LAST-MODIFIED:20261104T143540Z
UID:10883-1794873600-1794959999@techworks.org.uk
SUMMARY:Virtual Mask Solutions Seminar 2026
DESCRIPTION:
URL:https://www.synopsys.com/events/virtual-mask-solutions-seminar-2026.html?utm_source=techworks&utm_medium=paidtrade&utm_campaign=eda_mask-solutions&utm_content=mask-seminar-26_link_mul_evt#new_tab
LOCATION:Webinar
CATEGORIES:Member Event
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20261119T130000
DTEND;TZID=Europe/London:20261119T140000
DTSTAMP:20261012T095105Z
CREATED:20260928T100828Z
LAST-MODIFIED:20261012T095105Z
UID:10062-1795093200-1795096800@techworks.org.uk
SUMMARY:Ready for the Boardroom: Communicate with Influence and Impact
DESCRIPTION:With Nina Terzic\, Independent Strategic Consultant \nNina will explore what it takes to be boardroom-ready\, how to communicate with influence and impact\, and how to build the confidence\, presence and strategic relationships needed to operate effectively at senior level’. \nShe will then break the conversation down into 3 pillars: \nPillar 1: The Transition from Expert to Authority (Positioning & Executive Voice) \nCore Execution: Shifting from selling manual input and data to commanding strategic value and executive confidence. How to speak clearly and ensure your institutional value is understood immediately\, especially when navigating high-pressure\, male-dominated environments. \nPillar 2: Transatlantic Mobility & Strategic Networking (Getting into the Right Rooms) \nCore Execution: The mechanics behind building a powerful network and unlocking doors that are traditionally inaccessible. Transitioning from simply consuming information to actively curating international cross-border opportunities. \nPillar 3: The Art of the Sprezzatura Pause (Negotiation & Stakeholder Management) \nCore Execution: Mastering strategic boundaries and emotional intelligence. How to seamlessly adapt and calibrate your core message depending on your audience—whether you are presenting to an executive board member\, a venture capitalist investor\, or your own internal team. \nBiography \nNina Terzic is originally from Zagreb\, Croatia\, last 5 years she has been based in Zurich\, Switzerland. \nHer background is in high – level diplomacy\, and she has spent 15 years working for the government and international institutions as a diplomat\, with mandates in Croatia\, Brussels\, PR China\, Latvia\, Turkmenistan\, Bulgaria and Vienna. And closely cooperating with many institutions – EC\, UN on big strategic projects. \nThrough living and working in 11 countries\, Nina has built a global network of institutional and capital contacts that open doors for my clients that are otherwise inaccessible. \nToday\, she works from Zurich as an independent Strategic Consultant\, specializing in 3 key areas: \n\npolicy advisory – advice on policies and regulations\nfundraising – raising capital\nmarket entry – entering a new market\n\nIn short\, her job is to connect companies with the capital\, with the institutions\, make their story profitable and visible\, at the highest level. \nIn addition\, Nina is also a Lead of WCS Zurich\, International Women Business Club in the energy field\, she is active in various global initiatives\, such as UN Vienna working groups and Partner of the WEF Davos.
URL:https://techworks.org.uk/event/ready-for-the-boardroom-communicate-with-influence-and-impact/
LOCATION:Webinar
CATEGORIES:AESIN,DESN,IoTSF,NMI,TechWorks,Webinar,Women in TechWorks
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20261125T100000
DTEND;TZID=Europe/London:20261125T143000
DTSTAMP:20261111T102625Z
CREATED:20260904T090645Z
LAST-MODIFIED:20261111T102625Z
UID:9341-1795600800-1795617000@techworks.org.uk
SUMMARY:AI in FPGA Design Flows - Hype\, Help or Transformation?
DESCRIPTION:This is a  DESN | FPGA Frontrunners event \nArtificial Intelligence is rapidly becoming one of the most discussed developments in Electronic Design Automation (EDA). Recent industry conferences have highlighted the emergence of AI-assisted engineering workflows\, copilot tools\, and increasingly capable agentic AI systems that can autonomously perform complex design and verification tasks. \nFor the FPGA community\, this raises important questions: \n\nWhere is AI delivering genuine value today?\nWhich parts of the FPGA development lifecycle benefit most?\nAre productivity gains measurable and repeatable?\nWhat challenges remain around trust\, verification and governance?\nHow will AI affect FPGA design methodologies over the next five years?\nWill RTL remain the dominant abstraction\, or will new AI-assisted approaches emerge?\n\nThis TechWorks FPGA Network event aims to move beyond industry hype and focus on practical experience from engineers and organisations actively using AI within FPGA development environments. \nThe event will be hosted by Siemens in London and will bring together FPGA designers\, verification engineers\, technical leaders\, end users and EDA vendors to share real-world experiences and lessons learned. \nAgenda\n\n\n\nTime\nSession\nSpeaker(s)\n\n\n\n\n10:00\nRegistration\n\n\n\n10:30\nWhat has AI ever done for\nPeter Trott\, Staff Field Applications Engineer\, Microchip\n\n\n11:00\nGive the agents what they need: an FPGA toolchain built for AI agents\nDaniel Mazure\, Founder\, RouteRTL\n\n\n11:30\nAI-Assisted Embedded FPGA Design for Satellite Avionics\nRajan Bedi\, CEO\, Spacechips\n\n\n12:00\nRise of the Design and Verification Scientist\nYassine Eben Aimine\, Product Architect\, Siemens EDA\n\n\n12:30\nLunch\n\n\n\n13:30\nFrom Copilot to Autonomous FPGA Engineer: Comprehension-Gated and Governed AI Design Flows\nPedro Machado\, Associate Professor of Neuromorphic Computing / Chief Scientific Officer\, Nottingham Trent University / Sundance Multiprocessor Technology\n\n\n14:00\nModel to RTL: How Heronic Automates the Design of Specialised AI Accelerators\nAlexander Montgomerie-Corcoran\, CEO\, Heronic Technologies\n\n\n14:30\nA Chatbot Answers\, An Agent Iterates: Two-Loop FPGA Design with Independent Checks\nLeonardo Capossio\, Founder & Principal Engineer\, bard0 design — remote speaker\n\n\n15:00\nAccelerating Verification Closure with AI Agents: Practical Deployments and Flow Orchestration\nTulio Bitencourt Pereira\, ASIC Design Verification Engineer – Hardware\, Embedded Analytics\, Siemens EDA \nPo-Shao Cheng\, ASIC Design Verification Engineer – Hardware\, Embedded Analytics\, Siemens EDA \nPawel Polrolniczak\, ASIC Design Verification Inter – Hardware\, Embedded Analytics\, Siemens EDA\n\n\n15:30\nWrap up\n\n\n\n15:45\nDepart\n\n\n\n\nSpeakers\nAlexander Montgomerie-Corcoran \nCEO\, Heronic Technologies \n\nFind out More\n×\nAlexander Montgomerie-Corcoran\nCEO\, Heronic Technologies\nPresentation: Model to RTL: How Heronic Automates the Design of Specialised AI Accelerators \nFPGAs are a powerful platform for deploying AI models in settings ranging from embedded systems at the edge to the data centre. The fine-grain configurability of FPGA devices affords them the ability to deploy highly customized accelerator designs\, instead of the model being forced onto a fixed\, general-purpose architecture. In practice\, this advantage is hard to realise. The design space for an AI accelerator is vast: each layer can be parallelised\, pipelined\, quantised and allocated resources in many different ways. The best configuration depends on the model\, the target device and the objective (throughput\, latency\, power or area). Manually exploring this design space takes months of design and verification\, and the result rarely carries over to the next model. \nThis talk presents MOSAIC\, Heronic’s toolflow for automatically mapping trained CNN models to FPGA hardware. MOSAIC builds each accelerator from a library of parameterised streaming-architecture components\, then uses automated design space exploration to find the configuration that best meets a given objective and resource budget. The output is synthesisable RTL generated directly from the model. \nThis talk will cover how the toolflow works\, from model ingestion and the streaming hardware templates to the optimisation algorithms that drive the search\, and show how it has been used to produce high-performance designs for image classification\, object detection\, TinyML and video enhancement workloads. \nBiography \nAlexander Montgomerie-Corcoran is the Co-Founder and CEO of Heronic Technologies. Prior to starting the company\, Alex completed his PhD at Imperial College London\, researching methods for accelerating AI on FPGA devices. \nCloseDaniel J.\nMazure \nFounder\, RouteRTL \n\nFind out More\n×\nDaniel J. Mazure\nFounder\, RouteRTL\nPresentation: Give the agents what they need: an FPGA toolchain built for AI agents \nAI agents can do real FPGA work when the toolchain gives them what they need: written requirements to work against\, commands that return clear results\, and a reliable way to check their work on hardware. This talk shows how RouteRTL provides each one: requirement catalogues linked to cocotb tests\, with coverage showing which requirements an asserted test closes; one headless command surface with machine-readable output and an MCP server\, shared by engineers\, CI and agents; and hardware contracts\, run on reserved boards and checked against declared requirements. All three are in daily use by agents writing RTL and tests. \nBiography \nDaniel J. Mazure has spent more than ten years designing and verifying FPGA systems for companies across a range of fields\, covering RTL design\, verification\, embedded Linux and board bring-up. Through that work he has identified what companies lack to bring AI into FPGA development: written requirements\, flows an agent can run\, and dependable checks on hardware. He now helps companies close that gap\, and develops RouteRTL\, a command-line SDK that gives agents and engineers one flow for build\, simulation and verification across AMD\, Altera and Microchip devices. \nClosePeter\nTrott \nStaff Field Applications Engineer\, Microchip \n\nFind out More\n×\nPeter Trott\nStaff Field Applications Engineer\, Microchip\nPresentation: What has AI ever done for me \nAs a historic AI cynic when it comes to AI due to a perceived lack of references for large language models\, for a long time results of its use were not good for FPGA design. However\, this presentation will demonstrate with a real world example of how this has changed and FPGA design capture and generation can be enhanced today using AI. Coupled with this\, the productivity gap can also be accelerated developing exhaustive testbenches and the debug process enhances. All resulting into a faster product development. \nBiography \nPeter Trott is a staff FAE with Microchip with 30 years of programmable logic experience working for AMD/Vantis/Lattice\, Mathstar and for the last 20 years Actel/Microsemi/Microchip. \nAs well as supporting customers in EMEA\, Peter is the lead of the technical FAE team in Europe and outside of Microchip has been a member of TC47X (Working Group 4) developing the harmonized standard for FPGAs to support the EU CRA legislation. \nCloseLeonardo\nCapossio \nFounder & Principal Engineer\, bard0 design \n\nFind out More\n×\nLeonardo Capossio\nFounder & Principal Engineer\, bard0 design\nPresentation: A Chatbot Answers\, An Agent Iterates: Two-Loop FPGA Design with Independent Checks \nAI agents can edit RTL and run tools\, but passing tests does not establish correctness. This talk presents a two-loop FPGA workflow: rapid lint and simulation iterations\, followed by synthesis and implementation against reviewed constraints. An AXI-Stream width converter illustrates independent reference checking\, protected acceptance criteria\, bounded retries\, and engineering review. We examine how regressions\, routed timing and resource reports guide iteration\, where agents can game incomplete checks\, and when engineers must intervene. Attendees will learn to evaluate engineering effort and implementation quality against a baseline before calling automation a transformation. \nBiography \nLeonardo Capossio is the founder and principal engineer at bard0 design\, with over 15 years of FPGA engineering experience across aerospace\, defence\, camera systems\, and robotics. His work spans FPGA architecture\, IP development\, and verification. He writes about practical AI workflows for FPGA engineering\, including tool integration\, independent verification\, and the role of engineering judgement in reviewing generated RTL. \nCloseDr. Rajan\nBedi \nCEO\, Spacechips \n\nFind out More\n×\nDr. Rajan Bedi\nCEO\, Spacechips\nPresentation: AI-Assisted Embedded FPGA Design for Satellite Avionics \nAI is assisting embedded FPGA design for satellite avionics throughout all stages of the development lifecycle: from system architecture trade-offs\, BoM component selection and comparison\, hardware/software design\, verification\, worst-case/reliability analyses\, design reviews\, project management and sign-off. AI can generate RTL\, verification test benches and constraints\, however\, experience shows code needs to be checked for quality\, reliability and coverage before releasing IP. AI-produced VHDL has brought value to FPGA development\, providing a useful reference to accelerate the delivery of embedded systems. AI-assisted engineering is being used to complement the Siemens’ PCB/FPGA design flows\, assisting the Expedition\, Hyperlynx and IO Optimiser tools. \nBiography \nDr. Rajan Bedi has worked in the global space industry for 25 years designing and developing the technology used on-board satellites and spacecraft. In 2014\, he founded Spacechips winning Start-Up Company of the Year and High-Reliability Product of 2016\, 2017\, 2018 and 2025. In 2024\, Dr. Bedi won Technology Entrepreneur of the Year and in 2020\, Disruptive Entrepreneur of the Year\, at the Great British Entrepreneur Awards. Dr. Bedi has designed-in nearly every space-grade FPGA as well as many COTS devices for satellite applications. He also teaches courses on Space Electronics\, FPGA Design as well as AI-Assisted Engineering Satellite Avionics\, that demonstrate the Siemens’ EDA tools. Dr. Bedi is the author of\, Out-of-this-World-Design\, a blog on Space Electronics that has been read over 9 million times. Dr. Bedi is also a regular presenter at Siemens’ User2User Europe. \nCloseYassine Eben\nAimine\n \nProduct Architect\, Siemens EDA \n\nFind out More\n×\nYassine Eben Aimineo\nProduct Architect\, Siemens EDA\nPresentation: Rise of the Design and Verification Scientist \nFPGA engineering is reaching an inflection point\, evolving the traditional engineer into a Design and Verification Scientist who directs autonomous AI workflows. This session introduces the Questa One Agentic ToolKit (ATK)\, showing how agentic orchestration moves beyond simple copilots into production-ready automation. Focusing on front end design\, we examine how the Lint Agent uses deep domain context to autonomously analyze\, explain\, and suggest targeted fixes for RTL violations before costly synthesis runs. Learn how coupling AI reasoning with deterministic EDA engines and explicit engineer approval gates eliminates trial-and-error debug and accelerates FPGA time to bitstream. \nBiography \nYassine Eben Aimine is a Product Architect for Static and Formal Tools at Siemens EDA. Yassine has over 25 years experience in the space of EDA product and customer engineering. As part of his current role\, he is guiding R&D teams to maintain\, enhance and develop EDA products using the latest AI technologies available. Yassine holds a masters degree in Electronics and Computing. \nCloseDr Pedro Machado\n \nAssociate Professor Of Neuromorphic Computing\nNottingham Trent University \n\nFind out More\n×\nDr Pedro Machado\nAssociate Professor Of Neuromorphic Computing\nNottingham Trent University\nPresentation: From Copilot to Autonomous FPGA Engineer: Comprehension-Gated and Governed AI Design Flows \nAI is moving from code completion towards agents that can generate RTL\, interpret tool reports\, modify constraints\, invoke simulation and synthesis\, and iteratively optimise FPGA designs. The critical question is no longer only what an agent can do\, but when it should be allowed to do it. We propose a dual-gate governance concept combining comprehension-aware autonomy with deterministic authority control. Agent permissions are adjusted according to design risk\, verified human understanding\, and action scope\, while consequential operations remain mediated by policy and approval. FPGA design provides a compelling testbed for determining when AI is hype\, useful assistance\, or workflow transformation. \nBiography \nPedro Machado is Associate Professor of Neuromorphic Computing at Nottingham Trent University\, Chief Scientific Officer at Sundance Multiprocessor Technology Ltd. and a Royal Academy of Engineering Leverhulme Trust Research Fellow. His research spans neuromorphic computing\, FPGA-based intelligent systems\, spiking neural networks\, agentic AI and distributed intelligent architectures. He develops hardware and software approaches for deploying adaptive AI at the edge\, with applications including autonomous systems\, sensing and environmental monitoring. His current research also investigates how increasingly autonomous AI agents can be governed\, verified and integrated into engineering workflows \nCloseTessent Embedded Analytics Verification Team\n \nDigital Verification Engineers\, Siemens EDA \n\nFind out More\n×\nTessent Embedded Analytics Verification Team\nDigital Verification Engineers\, Siemens EDA\nPresentation: Accelerating Verification Closure with AI Agents: Practical Deployments and Flow Orchestration \nAI is moving from an emerging to an established technology in design verification\, the most time and resource-intensive part of front-end ASIC/FPGA development. As complexity grows\, teams seek solutions to cut debugging effort\, accelerate verification closure and shorten regression cycles in pursuit of first time silicon success. This presentation shows how our team customises agents\, skills and MCPs for specification analysis\, RTL debug\, coverage unreachability analysis and verification-flow orchestration. We examine the practical impact of these techniques in our team and how to balance relying on AI\nsolutions while keeping the engineer firmly in control. \nBiography \nTessent Embedded Analytics (EA) is an industry leader in functional monitoring\, enabling processor and system-wide trace and debug in real-time and post-deployment analytics for complex System-on-Chips (SoCs). Part of EA’s Hardware Group\, the Tessent Embedded Analytics Digital Verification team is responsible for verifying highly complex and fully configurable RTL designs. \nClose
URL:https://techworks.org.uk/event/ai-in-fpga-design-flows-hype-help-or-transformation/
LOCATION:Siemens\, 26-28 Hammersmith Grove\, London\, W6 7HA
CATEGORIES:DESN,TechWorks
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20261125T140000
DTEND;TZID=Europe/London:20261125T140000
DTSTAMP:20261016T161806Z
CREATED:20261019T080008Z
LAST-MODIFIED:20261016T161806Z
UID:10535-1795615200-1795615200@techworks.org.uk
SUMMARY:Building Trust\, Respect & Visibility
DESCRIPTION:Practical leadership lessons for mid-career women in tech ready to expand their influence\nThis is an A&G TechMinds Webinar\, hosted in collaboration with Women in TechWorks – Featuring Audrey Hayden\, Senior Director of Engineering Delivery at Arm. \nAs careers progress\, technical expertise is no longer enough. The ability to build trust\, earn respect\, and make your impact visible becomes critical to opening new opportunities\, influencing decisions\, and stepping into broader leadership roles. \nIn this interactive webinar\, Audrey Hayden\, Senior Director of Engineering Delivery at Arm\, will share practical lessons drawn from more than 20 years in technology and leadership\, with a focus on the moments\, choices\, and relationships that shape career growth. \nAudrey will explore what trust\, respect\, and visibility really look like in practice: how to build credibility\, strengthen professional relationships\, navigate challenging dynamics\, and ensure that your contribution is recognized. \nDesigned especially for mid-career talents in technology\, the session will combine real leadership stories\, interactive polls\, reflection\, and audience Q&A. \nAbout Audrey Hayden \nAudrey Hayden started her career as a software developer and is now Senior Director of Engineering Delivery at Arm. With more than 20 years in tech\, she has worked across global teams\, built a delivery organization from the ground up\, and coached people through growth and change. \n 
URL:https://techworks.org.uk/event/building-trust-respect-visibility/
LOCATION:Webinar
CATEGORIES:TechWorks,Webinar,Women in TechWorks
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20261203
DTEND;VALUE=DATE:20261204
DTSTAMP:20260922T095428Z
CREATED:20260921T143950Z
LAST-MODIFIED:20260922T095428Z
UID:9867-1796256000-1796342399@techworks.org.uk
SUMMARY:TechWorks Gala Dinner and Awards 2026
DESCRIPTION:
URL:https://techworks.org.uk/awards
LOCATION:Hilton London Metropole\, 225 Edgware Road\, London\, W2 1JU
CATEGORIES:AESIN,DESN,IoTSF,NMI,TechWorks,TechWorks AI
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20261210T130000
DTEND;TZID=Europe/London:20261210T140000
DTSTAMP:20261105T091958Z
CREATED:20260916T150740Z
LAST-MODIFIED:20261105T091958Z
UID:9738-1796907600-1796911200@techworks.org.uk
SUMMARY:Bumps\, Setbacks\, and Persistence: An honest look at an entrepreneurship journey
DESCRIPTION:Fireside chat with Yike Fang\, founder of X-Seed Technology\nYike Fang is the founder of X-Seed Technology\, a UK based cybersecurity\, data\, and ethical AI company. Her multicultural perspective shapes everything she does\, keeping an openness to different viewpoints\, a curiosity about how others experience the world. Her career spans over a decade in automotive engineering and vehicle cybersecurity with major OEMs and Tier 1 suppliers\, before she transitioned into entrepreneurship. Under her leadership\, X-Seed has earned multiple award shortlisting’s in its first year and secured competitive grant funding for HackRoom\, a gamified pop-up cybersecurity escape room; and XSeeker\, an AI powered career intelligence platform piloting in 2026. Yike has partnered with Women in TechWorks to roll out XSeeker as part of their mentorship programme\, supporting women at every stage of their professional journey. She is a guest lecturer at University of Birmingham\, UK Coordinator for the ASRG\, and a mentor for women in engineering. Still early in her entrepreneurial journey\, she believes in learning by doing and in the persistence that meaningful work requires. “Life is what you make it”\, and what she wants to make is something that genuinely helps people.
URL:https://techworks.org.uk/event/bumps-setbacks-and-persistence-an-honest-look-at-her-entrepreneurship-journey/
LOCATION:Webinar
CATEGORIES:AESIN,DESN,IoTSF,NMI,TechWorks,Webinar,Women in TechWorks
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20270128T140000
DTEND;TZID=Europe/London:20270128T150000
DTSTAMP:20260928T120607Z
CREATED:20260925T124148Z
LAST-MODIFIED:20260928T120607Z
UID:10043-1801144800-1801148400@techworks.org.uk
SUMMARY:Confidence-enabling environments: the business case
DESCRIPTION:With Ana Indoitu\, Director of People\, Operations & Growth \nConventional wisdom puts the responsibility of confidence building on the individual: improve your mindset\, practice your pitch\, repeat positive affirmations and avoid panic. Yet even the most capable people struggle to contribute when the environment is unclear\, punitive or dismissive. A seed can have all the potential in the world; it still will not thrive in barren soil. \nThis workshop builds of my professional journey as an enabler – shifting the question from “How can people become more confident?” to “What are we doing as organisations – intentionally or accidentally – to make confidence possible?” \nWe will explore how leaders and organisations can create the “fertile soil” for people to speak up\, take healthy risks\, learn from mistakes and bring innovation to work. Because confidence is not only an individual trait – it is also a reflection of the conditions we build around people. \nAnd when those conditions are right\, confidence stops being a motivational slogan and becomes a competitive advantage. \nWhat to expect: \nThe answers to the following 3 questions: \n\nWhy confidence matters to organisations?\nWhat makes a culture confidence-enabling?\nHow to enable confidence for individuals and teams?\n\nBiography \nWith a background in law and development management\, Ana shares 9+ years in leadership roles. She is a founder and manager of companies from their initial growth stage to scaling up across software\, hardware development and development industries. Ana is a hands-on professional\, with experience in building the HR function and team. With expertise in talent management\, employee engagement\, performance optimization\, and organizational development\, Ana has successfully contributed to the growth of several organizations. Ana is passionate about aligning talent practices with business objectives\, optimizing talent acquisition\, and shaping workplace culture that supports innovation\, collaboration\, and long-term success.
URL:https://techworks.org.uk/event/confidence-enabling-environments-the-business-case/
LOCATION:Webinar
CATEGORIES:TechWorks,Webinar,Women in TechWorks
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