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Raising Partners Live: Funding in Focus 2022

University of Strathclyde16 Richmond Street, Glasgow

10TH MAY 2022

Raising Partners Live brings together investors and entrepreneurs to advance the entrepreneurial ecosystem by empowering start-up and scale-up tech businesses to access capital.

ZEISS: Advanced Packaging Analysis Solutions

Webinar

17th MAY 2022

With the slowing of Moore’s Law, there has never been more urgency to address challenges for integrated circuit (IC) package characterization and failure analysis (FA) in the More than Moore (MtM) era.

ManySecured Workshop

Caledonian Club9 Halkin St, London, United Kingdom

17TH MAY 2022

The ManySecured Gateway Project is a collaborative project co-funded by Innovate UK, the UK’s innovation agency partnered by nquiringMinds, CISCO, University of Oxford Cyber Security Centre and the IoT Security Foundation.

ECS: The Electronic Component Show

Kassam StadiumLittlemore, Oxford

19TH MAY 2022

This new one-day event offers the opportunity for design engineers and purchasing professionals to network with electronic manufacturers, distributors and service providers to source new products, solutions and contacts.

INFICON: Semiconductor Gas Analysis Sensor Applications

Webinar

26th MAY 2022

This webinar will focus on gas analysis applications in semiconductor manufacturing processes in which through the use of INFICON’s smart manufacturing software and industry leading sensors you can maximize throughput and yield, while also minimizing scrap.

IoTSF Plenary 32

Caledonian Club9 Halkin St, London, United Kingdom

9th JUNE 2022

Join us on 9th June in London to hear about IoTSF’s projects & industry guest speakers covering key developments in IoT Security

CadenceTECHTALK: Increase Efficiency and Reduce Risks with IC and Package Co-Design Flows

Webinar

14th JUNE 2022

System designers face increasing challenges to meet technical specification and time-to-market requirements. While process nodes continue to shrink, the complexity of packages continue to grow. Large pin counts of flipped and rotated ICs may accidentally lead to I/O misalignment between die and package. Consequently, disjointed design tools and flows provide a serious risk for product failure.