Member Event

5-6^th JULY 2022

The Centre for Power Electronics (CPE) Annual Conference will bring together the Power Electronics, Machines and Drives Community to review the latest Research and Development that will impact the Electric Revolution.

14^th JULY 2022

This Synopsys webinar explains how designers can overcome these challenges by accounting for PCIe 6.0 system-level co-design in pre-silicon. In addition, the Synopsys webinar highlights the importance of pre-silicon validation for overall system integration, performance and compliance.

In this Synopsys webinar, we will showcase how to use Synopsys VC Formal DPV, a formal verification app for datapath validation, to accomplish the challenging verification tasks.

his webinar, presented by Alexander Wakefield, Synopsys Scientist, will focus on Synopsys RTL power analysis technology and best practices that achieve consistent accuracy in the design flow.

This webinar will showcase the design, analysis, and optimization of a multi-die fabric architecture based on the next generation Arm® CoreLink™ CMN-700 interconnect, a high-performance cache coherent interconnect solution designed for complex multi-die system-on-chip (SoC), such as those found in data centers.

In this webinar, you will learn about the latest trends in 1.6T Ethernet, when you can expect this standard, and the deployment challenges.

Attend this webinar series to find out about some of the essential requirements that can help you overcome multi-die system challenges and make your move to multi-die systems successful.

This 30-minute Webinar aims to show chip designers how they can best ensure secure data is handled correctly inside the chip while reducing deployment time.

In this Synopsys webinar, presenters from SiFive will share the advantages of Synopsys Formality ECO on their overall ECO cycle which has enhanced patching capabilities and resulted in faster verification runtime leading to improved TAT.